The present invention relates to a stacked semiconductor package and a method for manufacturing the same, and more particularly to a stacked semiconductor package in which semiconductor chips are formed in a stair manner to prevent damage, and method for manufacturing the same.
Recent developments in semiconductor manufacturing technology have lead to various types of semiconductor packages with semiconductor devices suitable for processing more data within a short time.
The semiconductor package is manufactured through: a semiconductor chip manufacturing process that manufactures semiconductor chips having semiconductor devices on a wafer made of high purity silicon; a die sorting process that electrically tests semiconductor chips; and a packaging process that packages the good semiconductor chips.
Recent developments in semiconductor packages include a chip scale package where the size of the semiconductor package is only 100% to 105% of the size of the semiconductor chip and a stacked semiconductor package where a plurality of semiconductor chips are stacked on each other to improve the data capacity and processing speed of the semiconductor device.
Additional technological developments have lead to a semiconductor product that improves data capacity and processing speed by improving the integration density of the semiconductor chip, as well as a semiconductor product that improves data capacity and processing speed by stacking a plurality of semiconductor chips.
Referring now to the stacked semiconductor package with a plurality of stacked semiconductor chips, a high degree of technology is required when coupling bonding pads of the stacked semiconductor chips and contact pads of a substrate using a conductive wire.
When stacking semiconductor chips to improve the data capacity and processing speed the thickness of the semiconductor chip gradually gets thinner. Consequently, the recent semiconductor chip only has a thickness of several tens of micrometers (μm) to several hundreds of micrometers (μm).
However, problems can occur when stacking the semiconductor chips with the thickness of several tens of micrometers (μm) to several hundreds of micrometers (μm). When the bonding pads of the stacked semiconductor chips are bonded to the contact pads of the substrate, a wire bonding facility will use a wire bonding capillary. The semiconductor chips can be damaged due to the excessive impact applied to the semiconductor chips by the capillary.